The present invention relates to computer systems, and more specifically, to generating compiled code that indicates register liveness.
In computer architecture, a processor register is a small amount of storage available as part of a central processing unit (CPU) or other digital processor. Such registers are addressed by mechanisms other than main memory and typically can be accessed more quickly than main memory. Almost all computers load data from a larger memory into registers where it is used for arithmetic, manipulated, or tested, by some machine instruction. Manipulated data is then often stored back in main memory, either by the same instruction or a subsequent one. Modern processors use either static random access memory (RAM) or dynamic RAM as main memory, the latter often being implicitly accessed via one or more cache-levels. A common property of computer programs is locality of reference: the same values are often accessed repeatedly and holding frequently used values in registers improves performance. Processor registers are normally at the top of the memory hierarchy, and provide the fastest way to access data. The term processor register refers to the group of registers that are directly encoded as part of an instruction, as defined by the instruction set. Allocating frequently used variables to registers can be critical to a program's performance.
In computer software, an application binary interface (ABI) describes the low-level interface between an application program and the operating system or between the application program and another application. The ABI cover details such as data type, size, and alignment; the calling conventions which controls how function arguments are passed and how return values are retrieved; the system call numbers and how an application should make system calls to the operating system; and in the case of a complete operating system ABI, the binary format of object files, program libraries and so on. Several ABIs (e.g., the Interactive Unix ABI allowing to a wide range of programs to run on a variety of Unix and Linux variants for the Intel x86 architecture) allow an application program from one operating system (OS) supporting that ABI to run without modifications on any other such system, provided that necessary shared libraries are present, and similar prerequisites are fulfilled.
The program development cycle of a typical application program includes writing source code, compiling the source code into object files, building shared libraries, and linking of the object files into a main executable program. Additional preparation, including loading of the main executable program, and loading of the shared libraries for application start-up occurs before the application is executed on a particular hardware platform.
“Power ISA™ Version 2.06 Revision B” published Jul. 23, 2010 from IBM® and incorporated by reference herein in its entirety teaches an example reduced instruction set computer (RISC) instruction set architecture (ISA). The Power ISA will be used herein in order to demonstrate example embodiments, however the invention is not limited to Power ISA or RISC architectures. Those skilled in the art will readily appreciate use of the invention in a variety of architectures.
“z/Architecture Principles at Operation” SA22-7832-08, Ninth Edition (August, 2010) from IBM® and incorporated by reference herein in its entirety teaches an example FISC (complex instruction set computer) instruction set architecture.
“64-bit PowerPC ELF Application Binary Interface Supplement 1.9” (2004) from IBM and incorporated by reference herein in its entirety describes the 64-bit supplement to the PowerPC® Executable and Linking Format (ELF) ABI.
“Power Architecture® 32-bit Application Binary Interface Supplement 1.0 Linux®” (Apr. 19, 2011) and “Power Architecture® 32-bit Application Binary Interface Supplement 1.0-Embedded” (Apr. 19, 2011) from power.org and incorporated by reference herein in their entirety describe the 32-bit ABI.